Analysis of the latch-up process and current filamentation in high-voltage trench-IGBT cell arrays

We present a theoretical analysis of the formation of current filaments leading to the latch-up state that can occur during the turn-off process in a cell array of high-voltage (3.3 kV) trench insulated-gate bipolar transistors (trench IGBTs). Our investigations, based on self-consistent physical device simulations, aim at understanding the behavior of multiple cells, i.e. parallel cells as well as integrated structures, during overcurrent turnoff by studying the behavior of a representative single cell under identical conditions. With these insights we are able to analyse the latch-up mechanism itself as well as its consequences for the robustness of the device against latch-up. Furthermore, we gain an understanding of the formation of current filaments inside IGBT cells and their relation to device latch-up.