• DocumentCode
    1989221
  • Title

    False write through and un-restored write electrical level fault models for SRAMs

  • Author

    Adams, R. Dean ; Cooley, Edmond S.

  • Author_Institution
    Dartmouth´´s Thayer Sch. of Eng., Hanover, NH, USA
  • fYear
    1997
  • fDate
    11-12 Aug 1997
  • Firstpage
    27
  • Lastpage
    32
  • Abstract
    Static random access memory fault modeling typically is done at the functional level of abstraction. Electrical level simulations, however, demonstrate real fault models which were previously overlooked. False write through and un-restored write fault models are introduced. Two patterns are defined to identify such faults. Further benefits of electrical level fault modeling are discussed
  • Keywords
    SRAM chips; fault diagnosis; integrated circuit modelling; integrated circuit testing; SRAMs; electrical level fault models; false write through; fault modeling; functional level; un-restored write; Circuit faults; Circuit testing; Circuit topology; Coupling circuits; Fault detection; Microprocessors; Random access memory; SRAM chips; Solid modeling; Test pattern generators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Memory Technology, Design and Testing, 1997. Proceedings., International Workshop on
  • Conference_Location
    San Jose, CA
  • ISSN
    1087-4852
  • Print_ISBN
    0-8186-8099-7
  • Type

    conf

  • DOI
    10.1109/MTDT.1997.619391
  • Filename
    619391
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1989221