DocumentCode :
1989222
Title :
An improved FPGA implementation of CNN Gabor-type filters
Author :
Cesur, Evren ; Yildiz, Nerhun ; Tavsanoglu, Vedat
Author_Institution :
Electron. & Commun. Eng. Dept., Yildiz Tech. Univ., Istanbul, Turkey
fYear :
2011
fDate :
15-18 May 2011
Firstpage :
881
Lastpage :
884
Abstract :
In this paper, a new Cellular Neural Network (CNN) structure for implementing two dimensional Gabor-type filters is proposed over our previous design. The structure is coded in VHDL and realized on a state of the art Altera Stratix IV 230 FPGA. The prototype supports Full-HD 1080p resolution and 60 Hz frame rate. One dedicated processor is used for each Euler iteration, where time step is taken as the same as optimum step size, and 50 iterations are implemented. The input/output, control, RAM and communication blocks of the realization are taken from our second generation real time CNN emulator (RTCNNP-v2).
Keywords :
Gabor filters; digital filters; field programmable gate arrays; hardware description languages; neural nets; random-access storage; Altera Stratix IV 230; CNN Gabor type filters; CNN emulator; FPGA; RAM; RTCNNP-v2; VHDL; cellular neural network structure; communication block; two dimensional Gabor type filter; Artificial intelligence; Cellular neural networks; Equations; Field programmable gate arrays; Mathematical model; Random access memory; Streaming media;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), 2011 IEEE International Symposium on
Conference_Location :
Rio de Janeiro
ISSN :
0271-4302
Print_ISBN :
978-1-4244-9473-6
Electronic_ISBN :
0271-4302
Type :
conf
DOI :
10.1109/ISCAS.2011.5937707
Filename :
5937707
Link To Document :
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