Title :
Simple improvement stage for low voltage WTA and Rank Order circuits
Author :
Molinar-Solis, Jesus E. ; Garcia-Lozano, Rodolfo ; Morales-Ramirez, Alejandra ; Ramírez-Angulo, Jaime
Author_Institution :
Electron. Lab., CU Ecatepec Univ. Autonoma del Estado de Mexico, Ecatepec, Mexico
Abstract :
A simple improvement to Lazzaro´s Winner Take All (WTA) circuit is introduced. It allows lowering the voltage supply requirements so that it can be functional in fine line CMOS technology. A low voltage Rank Order Filter is derived from the WTA using current starving techniques. Electrical measurements of a prototype in CMOS 0.5μm technology verify the operation of the WTA circuit with VDD = 1.5V. Simulations in PSpice show the functionality of a Rank Order Circuit using the same principle.
Keywords :
CMOS integrated circuits; SPICE; low-power electronics; power supply circuits; Winner Take All circuit; current starving techniques; electrical measurements; low voltage WTA; rank order circuits; size 0.5 mum; voltage 1.5 V; voltage supply; Artificial neural networks; CMOS integrated circuits; CMOS technology; Integrated circuit modeling; Logic gates; Low voltage; Transistors;
Conference_Titel :
Circuits and Systems (ISCAS), 2011 IEEE International Symposium on
Conference_Location :
Rio de Janeiro
Print_ISBN :
978-1-4244-9473-6
Electronic_ISBN :
0271-4302
DOI :
10.1109/ISCAS.2011.5937708
