Title :
A hybrid spin-charge mixed-mode simulation framework for evaluating STT-MRAM bit-cells utilizing multiferroic tunnel junctions
Author :
Xuanyao Fong ; Roy, Kaushik
Author_Institution :
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
Abstract :
Multiferroic tunnel junctions (MFTJs) consisting of ferromagnetic contacts sandwiching a ferroelectric tunnel barrier have been proposed as possible data storage elements. However, a simulation framework is needed for evaluating and analyzing the design and performance of memory cells based on MFTJs. In this paper, we propose a spin-charge mixed-mode simulation framework that captures the device physics of the MFTJ for SPICE circuit simulations.
Keywords :
MRAM devices; electrical contacts; ferroelectric materials; ferroelectric storage; ferromagnetic materials; magnetic tunnelling; multiferroics; MFTJ; SPICE circuit simulation; STT-MRAM bit-cell evaluation; data storage element; ferroelectric tunnel barrier; ferromagnetic contact; hybrid spin-charge mixed-mode simulation; memory cell; multiferroic tunnel junction; Integrated circuit modeling; Junctions; Magnetic tunneling; Magnetization; Mathematical model; SPICE; Tunneling magnetoresistance;
Conference_Titel :
Simulation of Semiconductor Processes and Devices (SISPAD), 2013 International Conference on
Conference_Location :
Glasgow
Print_ISBN :
978-1-4673-5733-3
DOI :
10.1109/SISPAD.2013.6650652
