DocumentCode :
1989431
Title :
Low-Power and Hardware Efficient Decimation Filters in Sigma-Delta A/D Converters
Author :
Zhu, Hengfang ; Wu, Xiaobo ; Yan, Xiaolang
Author_Institution :
Institute of VLSI Design, Zhejiang University, Hangzhou, China, E-mail: zhuhf@vlsi,.ziu.edu.cn
fYear :
2005
fDate :
19-21 Dec. 2005
Firstpage :
665
Lastpage :
668
Abstract :
The power and area formulas for four popular Sinc-filter structures used in decimation filters were discussed in this paper. It was proved that the formulas are very useful in power or area estimation and comparison. The circuit implementations of each structure are illustrated. And the power and area comparisons of the four structures were simulated and analyzed. A further optimization technology for one of the efficient filter structures was also proposed.
Keywords :
Attenuation; Circuits; Costs; Delta-sigma modulation; Digital filters; Finite impulse response filter; Frequency; Hardware; Power dissipation; Transfer functions;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices and Solid-State Circuits, 2005 IEEE Conference on
Print_ISBN :
0-7803-9339-2
Type :
conf
DOI :
10.1109/EDSSC.2005.1635362
Filename :
1635362
Link To Document :
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