SoC design and implementation for JPEG 2000 floating point filter

JPEG 2000 is used as an alternative to solve the blocking artifact problem with the existing still image compression JPEG algorithm. However, it has shortcomings such as longer floating point computation time and more complexity in the procedure of enhancing image compression rate and decompressed rate. To compensate for these we propose to implement with hardware the JPEG 2000 algorithm´s filter part which requires a lot of floating point computation. This filter was designed on the basis of Daubechies 9/7 filter (Antonini et al., 1992) and DWT Filter (Skodras et al., 2001) chip is composed of 3-stage pipeline system to optimize the performance and size.