DocumentCode :
1989625
Title :
Charge Collection in Impact Ionization MOS Transistors
Author :
Wang, W.
Author_Institution :
Department of Electrical Engineering and Computer Science, University of Wisconsin - Milwaukee, Milwaukee. WI 53201-0784, USA, E-mail: wwang@uwm.edu
fYear :
2005
fDate :
19-21 Dec. 2005
Firstpage :
699
Lastpage :
702
Abstract :
Single Event Upset is listed as one of the major challenges for further scaled devices by ITRS. For any newly proposed device, it is very important to study the potential robustness against single event upset. The charge collection is the fundamental parameter to determine the device radiation hardness. In this paper, 2-D device simulations were performed to study the charge collection in impact ionization MOS devices. The charge collection dependencies on high energy particle strike location as well as different bias conditions have been investigated. Unlike in conventional SOI CMOS device, little charge amplification effect was observed in this emerging new device.
Keywords :
CMOS technology; Electrons; Feedback; Impact ionization; Leakage current; MOS devices; MOSFET circuits; Robustness; Single event upset; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices and Solid-State Circuits, 2005 IEEE Conference on
Print_ISBN :
0-7803-9339-2
Type :
conf
DOI :
10.1109/EDSSC.2005.1635371
Filename :
1635371
Link To Document :
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