A 0.24 to 2.4 GHz phase-locked loop with low supply sensitivity in 0.18-µm CMOS

This paper presents a phase-locked loop design with the supply-regulated voltage-controlled oscillator to enhance power supply immunity. The supply regulator associated with the voltage-controlled oscillator (VCO) employs the bandwidth adaption scheme by adjusting the bias current of OP-Amp. Measurement results show that the tuning range is from 0.24 to 2.4 GHz, and the output long term RMS jitter is 1.3% of the VCO period. The output clock has a sensitivity of 0.3% clock period with 1% supply disturbance when operating at 2.4 GHz. The PLL is realized with the standard 0.18-μm CMOS technology. The active area occupies 0.18 mm², and the maximum power dissipation is 18 mW.