A reconfigurable data-driven ALU for Xputers

Author

Hartenstein, Reiner W. ; Kress, Rainer ; Reinig, Helmut

Author_Institution

Kaiserslautern Univ., Germany

fYear

1994

fDate

10-13 Apr 1994

Firstpage

139

Lastpage

146

Abstract

A reconfigurable data-driven datapath architecture for ALUs is presented which may be used for custom computing machines (CCMs), Xputers (a class of CCMs) and other adaptable computer systems as well as for rapid prototyping of high speed datapaths. Fine grained parallelism is achieved by using simple reconfigurable processing elements which are called datapath units (DPUs). The word-oriented datapath simplifies the mapping of applications onto the architecture. Pipelining is supported by the architecture. The programming environment allows automatic mapping of the operators from high level descriptions. Two implementations, one by FPGAs and one with standard cells are shown

Keywords

digital arithmetic; logic arrays; programming environments; reconfigurable architectures; software prototyping; ALUs; Xputers; custom computing machines; datapath units; fine grained parallelism; mapping; processing elements; programming environment; rapid prototyping; reconfigurable data-driven datapath architecture; standard cells; word-oriented datapath; Arithmetic; Computer architecture; Field programmable gate arrays; Hardware; High level languages; Logic circuits; Logic programming; Programming environments; Prototypes; Reconfigurable logic;

fLanguage

English

Publisher

ieee

Conference_Titel

FPGAs for Custom Computing Machines, 1994. Proceedings. IEEE Workshop on

Conference_Location

Napa Valley, CA

Print_ISBN

0-8186-5490-2

Type

conf

DOI

10.1109/FPGA.1994.315602

Filename

315602