A new algorithm for PLA output phase optimization

Author

Liu, B.D. ; Wang, L.Y. ; Wang, J.F.

Author_Institution

Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan

fYear

1989

fDate

14-16 Aug 1989

Firstpage

1053

Abstract

The major problem in output phase optimization for PLA layout minimization is the reduction of the time for generating and minimizing the so-called double-phase characteristic function. A novel algorithm based on the concept of common complement set and separation theorem is proposed to handle this problem. Experimental results show that this method is quite efficient

Keywords

cellular arrays; circuit layout CAD; logic CAD; logic arrays; minimisation of switching nets; CAD; PLA; common complement set; computer aided design; double-phase characteristic function; layout minimization; output phase optimization; programmable logic array; separation theorem; Boolean functions; Carbon capture and storage; Character generation; Contracts; Councils; Heuristic algorithms; Minimization; Programmable logic arrays; Search methods; Virtual manufacturing;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1989., Proceedings of the 32nd Midwest Symposium on

Conference_Location

Champaign, IL

Type

conf

DOI

10.1109/MWSCAS.1989.102035

Filename

102035

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1990833