Title :
On the embedding of the MDG specification languages in HOL
Author :
Mizouni, R. ; Tahar, S. ; Curzon, P.
Author_Institution :
Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que., Canada
Abstract :
Summary form only given. We propose an embedding of the MDG input languages in HOL. The MDG (multiway decision graph) system is a tool for equivalence and model checking. It is based on multiway decision graphs that extend reduced-ordered binary decision diagrams with abstract sorts and uninterpreted functions. The HOL system is a higher-order logic theorem prover. It has an open user-extensible architecture, giving the possibility of adding expressiveness power to the theorem prover by embedding new theories. We have embedded in HOL the grammar of the MDG hardware description language, MDG-HDL, and the first-order temporal logic, /spl Lscr/;/sub mdg/, used to specify properties for the MDG model checker. A hybrid tool for formal verification, linking HOL with the MDG model checker, is proposed as an application of the developed embeddings.
Keywords :
binary decision diagrams; formal specification; formal verification; grammars; hardware description languages; temporal logic; theorem proving; HOL; MDG specification language embedding; MDG-HDL; formal hardware verification; grammar; hardware description language; high-order logic theorem prover; hybrid tool; model checker; multiway decision graph; reduced-order binary decision diagram; temporal logic; user-extensible architecture; Boolean functions; Data structures; Formal verification; Hardware design languages; Joining processes; Logic; Power system modeling; Specification languages;
Conference_Titel :
Computer Systems and Applications, 2003. Book of Abstracts. ACS/IEEE International Conference on
Conference_Location :
Tunis, Tunisia
Print_ISBN :
0-7803-7983-7
DOI :
10.1109/AICCSA.2003.1227503