Evaluating the effectiveness of a diversity TMR scheme under neutrons

Author

Tambara, Lucas A. ; Kastensmidt, F.L. ; Azambuja, Jose Rodrigo ; Chielle, Eduardo ; Almeida, Felipe ; Nazar, Gabriel ; Rech, P. ; Frost, Christopher ; Lubaszewski, Marcelo S.

Author_Institution

Inst. de Inf., UFRGS, Porto Alegre, Brazil

fYear

2013

fDate

23-27 Sept. 2013

Firstpage

1

Lastpage

5

Abstract

This paper explores the concept of Design Diversity Redundancy (DDR) applied to SRAM-based FPGAs as a proposal to increase system reliability. Three different implementations of an 8×8 matrix multiplication associated to majority voters were used to build a Diversity Triple Modular Redundancy (DTMR) scheme. The whole architecture was prototyped on a Xilinx Virtex5 FPGA and exposed to a neutron source for approximately 21 hours in order to investigate the occurrence of Single Event Effects. In addition, a fault injection campaign was performed in order to compare simulation and experimental data. Results indicate the ability of the system to tolerate faults.

Keywords

SRAM chips; fault tolerance; field programmable gate arrays; matrix multiplication; neutron effects; radiation hardening (electronics); redundancy; DDR; DTMR scheme; SRAM-based FPGA; Xilinx Virtex5 FPGA; design diversity redundancy; diversity triple modular redundancy scheme; fault injection campaign; matrix multiplication; neutron source; single event effects; system reliability; Circuit faults; Computer architecture; Fault tolerant systems; Field programmable gate arrays; Neutrons; Redundancy; Tunneling magnetoresistance; Design Diversity Redundancy; Fault Tolerance; SRAM-based FPGAs; Single Event Effects; Triple Modular Redundancy;

fLanguage

English

Publisher

ieee

Conference_Titel

Radiation and Its Effects on Components and Systems (RADECS), 2013 14th European Conference on

Conference_Location

Oxford

Type

conf

DOI

10.1109/RADECS.2013.6937382

Filename

6937382