DocumentCode
1992170
Title
SOI floating-body, device and circuit issues
Author
Gautier, J. ; Pelella, M.M. ; Fossum, J.G.
Author_Institution
CEA, Centre d´Etudes Nucleaires de Grenoble, France
fYear
1997
fDate
10-10 Dec. 1997
Firstpage
407
Lastpage
410
Abstract
This paper focuses on floating-body effects in MOSFETs and circuits on SOI substrates. We review different ways to coexist with these effects and particularly how to take advantage from them. It is shown that there is no blanket solution, but more a palette of approaches. Choosing the most appropriate one to a given application is addressed.
Keywords
CMOS integrated circuits; MOSFET; isolation technology; leakage currents; silicon-on-insulator; transient analysis; MOSFET; NMOSFET; SOI substrates; SOI/CMOS; circuit issues; drain conductance; field shield isolation technology; floating-body effects; partially depleted devices; transient leakage current; Delay; Fabrication; Immune system; Leakage current; MOSFET circuits; Microelectronics; Pulse measurements; Research and development; Substrates; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1997. IEDM '97. Technical Digest., International
Conference_Location
Washington, DC, USA
ISSN
0163-1918
Print_ISBN
0-7803-4100-7
Type
conf
DOI
10.1109/IEDM.1997.650411
Filename
650411
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