Power efficient polyphase decomposition comb decimation filter in multi-rate telecommunication receivers

A power efficient polyphase decomposition comb filter with a novel clock distribution algorithm for its memory elements is presented. The proposed algorithm results in a significant reduction in the dynamic power consumption, comparing with the conventional polyphase decomposition comb filter that is widely used as a first stage of decimation process in sample rate conversion for multi-rate telecommunication receivers. A general form of the proposed clock distribution algorithm is presented with respect to the decimation factor of the polyphase comb filter. It is shown that, using the proposed clock distribution algorithm reduces the dynamic power consumption of the memory elements for a second order polyphase comb filter up to 33.33%, 40%, 60.32%, and 71.37%. As well as, reducing the dynamic power consumption of the memory elements for a third order polyphase comb filter up to 25%, 33.33%, 54.29%, and 67.41% for decimation factors 2, 4, 8, and 16 respectively.