A processor element for a mixed signal cellular processor array vision chip

Author

Carey, Stephen J. ; Lopich, Alexey ; Dudek, Piotr

Author_Institution

Sch. of Electr. & Electron. Eng., Univ. of Manchester, Manchester, UK

fYear

2011

fDate

15-18 May 2011

Firstpage

1564

Lastpage

1567

Abstract

A combined analogue and digital processing element for a pixel-parallel vision chip has been designed in 0.18μm CMOS technology. In addition to 7 analogue registers, each pixel incorporates 14 bits of digital memory. In the analogue domain its processing capabilities include addition, subtraction and squaring, with digital domain NOT and OR operators also available. The processing element has dimensions of 32×32μm and is designed to operate at 10MHz. A test chip has been fabricated.

Keywords

CMOS logic circuits; CMOS memory circuits; logic gates; microprocessor chips; CMOS technology; NOT operators; OR operators; analogue domain; analogue processing element; analogue registers; digital memory; digital processing element; frequency 10 MHz; mixed signal cellular processor array vision chip; pixel-parallel vision chip; processor element; size 0.18 mum; word length 14 bit; CMOS integrated circuits; CMOS technology; Parallel processing; Radio access networks; Registers; Routing; Wires;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (ISCAS), 2011 IEEE International Symposium on

Conference_Location

Rio de Janeiro

ISSN

0271-4302

Print_ISBN

978-1-4244-9473-6

Electronic_ISBN

0271-4302

Type

conf

DOI

10.1109/ISCAS.2011.5937875

Filename

5937875