Semiconductor test pattern conversion using parallel processing techniques

This paper relates to the field of microprocessor testing. A microprocessor can take as input, a very large number of data patterns, and for each input data pattern, a corresponding expected output data pattern must be produced. To test a microprocessor, the device is placed on a tester, which feeds input data patterns, and collects output data patterns, from the device under test. The collected output data pattern is compared against the expected output data pattern in order to determine the correctness of the device under test. The data for the input patterns are provided by the microprocessor design team. With every design change, the input patterns must be regenerated. Changes in input patterns causes changes in the expected output patterns. Due to the large number of input patterns, an equally large number of expected output patterns have to be generated. As a result of this, a significant amount of time elapses before testing can proceed after each microprocessor design revision. In order to overcome this, we investigated the use of parallel processing for the generation of the expected output pattern file. The generation of the expected output pattern data - from a given set of input pattern data - is called "pattern conversion".