DocumentCode :
1995053
Title :
Model Checking Stencil Computations Written in a Partitioned Global Address Space Language
Author :
Abe, Takashi ; Maeda, T. ; Sato, Mitsuhisa
Author_Institution :
RIKEN Adv. Inst. for Comput. Sci., Kobe, Japan
fYear :
2013
fDate :
20-24 May 2013
Firstpage :
365
Lastpage :
374
Abstract :
This paper proposes an approach to software model checking of stencil computations written in partitioned global address space (PGAS)languages. Although a stencil computation offers a simple and powerful programming style, it becomes error prone when considering optimization and parallelization. In the proposed approach, the state explosion problem associated with model checking (that is, where the number of states to be explored increases dramatically) is avoided by introducing abstractions suitable for stencil computation. In addition, this paper also describes XMP-SPIN, our model checker for XcalableMP (XMP), a PGAS language that provides support for implementing parallelized stencil computations. One distinguishing feature of XMP-SPIN is that users are able to define their own abstractions in a simple and flexible way. The proposed abstractions are implemented as user-defined abstractions. This paper also presents experimental results for model checking stencil computations using XMP-SPIN. The results demonstrate the effectiveness and practicality of the proposed approach and XMP-SPIN.
Keywords :
computational geometry; formal verification; mathematics computing; partial differential equations; PGAS language; XMP-SPIN; XcalableMP; array manipulation technique; computer simulations; model checking stencil computations; partitioned global address space languages; programming style; state explosion problem; user-defined abstractions; Arrays; Computational modeling; Electronics packaging; Model checking; Reactive power; Software; Synchronization; XcalableMP; directive; model checking; stencil computation; user-defined abstraction;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel and Distributed Processing Symposium Workshops & PhD Forum (IPDPSW), 2013 IEEE 27th International
Conference_Location :
Cambridge, MA
Print_ISBN :
978-0-7695-4979-8
Type :
conf
DOI :
10.1109/IPDPSW.2013.90
Filename :
6650908
Link To Document :
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