DocumentCode :
1995779
Title :
A raised source/drain technology using in-situ P-doped SiGe and B-doped Si for 0.1-/spl mu/m CMOS ULSIs
Author :
Uchino, T. ; Shiba, T. ; Ohnishi, K. ; Miyauchi, A. ; Nakata, M. ; Inoue, Y. ; Suzuki, T.
Author_Institution :
Central Res. Lab., Hitachi Ltd., Kokubunji, Japan
fYear :
1997
fDate :
10-10 Dec. 1997
Firstpage :
479
Lastpage :
482
Abstract :
An advanced CMOS design, where a raised source/drain and contact windows are formed over the field oxide is realized by using P-doped SiGe and B-doped Si selective epitaxial growth techniques. Excellent short-channel characteristics and reduced parasitic drain junction capacitance were obtained. NMOS and PMOSFETs with an effective channel length of 0.12 /spl mu/m and ultra-shallow junctions with a depth of 25 nm were fabricated. These devices had a low extension resistance of about 370 /spl Omega//sq.
Keywords :
CMOS integrated circuits; Ge-Si alloys; ULSI; boron; capacitance; elemental semiconductors; phosphorus; semiconductor epitaxial layers; semiconductor growth; semiconductor materials; silicon; vapour phase epitaxial growth; 0.12 micron; 25 nm; CMOS; SiGe:P-Si:B; ULSI; contact windows; effective channel length; extension resistance; field oxide; parasitic drain junction capacitance; raised source/drain technology; selective epitaxial growth techniques; short-channel characteristics; ultra-shallow junctions; CMOS technology; Epitaxial growth; Fabrication; Germanium silicon alloys; Laboratories; MOS devices; MOSFET circuits; Parasitic capacitance; Silicon germanium; Tungsten;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1997. IEDM '97. Technical Digest., International
Conference_Location :
Washington, DC, USA
ISSN :
0163-1918
Print_ISBN :
0-7803-4100-7
Type :
conf
DOI :
10.1109/IEDM.1997.650428
Filename :
650428
Link To Document :
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