DocumentCode
1995989
Title
Implementation of 4-bit carry select adder using Diode free adiabatic logic (DFAL)
Author
Singh, Sanjay ; Srinivasarao, K.
Author_Institution
Electron. & Commun. Eng. Dept., MEWAR Univ., Chittorgarh, India
fYear
2015
fDate
9-11 July 2015
Firstpage
481
Lastpage
484
Abstract
Adiabatic Logic is the most effective technique which is used for implementing of low power digital logic circuits. In this research paper to designed low power Dissipation carry select adder using DFAL 2X1 mux and Diode free adiabatic logic (DFAL) which compare proposed adder circuit with CMOS Technology Designed Adder for low power VLSI Application. In digital electronics, adder is a play important role that performs addition of binary numbers. Now a days The Propagation Delay of Each adder is major problem overcomes by using Carry select Adder. Its area is slightly increasing as compared with normal adder. In this research paper we have used T_SPICE simulator at 0.18μm technology with Mosis Modal and 1.8V standard CMOS for simulation. We have observed that Diode free adiabatic technique saves 55% more power in comparison of CMOS logic with the transition frequency range of 10-80MHZ.
Keywords
CMOS logic circuits; VLSI; adders; logic circuits; 4-bit carry select adder; CMOS technology designed adder; DFAL; Mosis modal; T_SPICE simulator; digital electronics; diode free adiabatic logic; low power VLSI application; low power digital logic circuits; Adders; CMOS integrated circuits; CMOS technology; Capacitance; Inverters; Power dissipation; Very large scale integration; Adder; Adiabatic Logic; CSLA; DFAL; Low power; T-SPICE;
fLanguage
English
Publisher
ieee
Conference_Titel
Recent Trends in Information Systems (ReTIS), 2015 IEEE 2nd International Conference on
Conference_Location
Kolkata
Type
conf
DOI
10.1109/ReTIS.2015.7232927
Filename
7232927
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