Title :
A hierarchical constraint graph generation and compaction system for symbolic layout
Author :
de Lange, A.A.J. ; de Lange, J.S.J. ; Vink, J.F.
Author_Institution :
Dept. of Electr. Eng., Delft Univ. of Technol., Netherlands
Abstract :
A novel approach and system for graph-oriented layout compaction for large symbolic layout designs is presented. Hierarchical compaction is performed by generating geometrical interfaces for compacted subcells which are used as rigid nodes in graphs at higher hierarchical levels. Further reduction of the complexity of graph generation and compaction is achieved by setting only local constraints in the graphs, which requires an iterative graph-generation/compaction scheme
Keywords :
circuit layout CAD; graph theory; compacted subcells; complexity; geometrical interfaces; graph-oriented layout compaction; hierarchical constraint graph compaction; hierarchical constraint graph generation; hierarchical levels; iterative graph-generation/compaction scheme; local constraints; rigid nodes; symbolic layout designs; Circuits; Compaction; Control systems; Iterative algorithms; MOS devices; Scheduling algorithm; User interfaces;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1989. ICCD '89. Proceedings., 1989 IEEE International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-1971-6
DOI :
10.1109/ICCD.1989.63423
