Architecture and implementation of a Software-Defined Radio baseband processor

Author

Ramacher, U. ; Raab, W. ; Hachmann, U. ; Langen, D. ; Berthold, J. ; Kramer, R. ; Schackow, A. ; Grassmann, C. ; Sauermann, M. ; Szreder, P. ; Capar, F. ; Obradovic, G. ; Xu, W. ; Brüls, N. ; Lee, Kang ; Weber, Eugene ; Kuhn, Ray ; Harrington, John

Author_Institution

WLS SDR SE, Infineon Technol. AG, Neubiberg, Germany

fYear

2011

fDate

15-18 May 2011

Firstpage

2193

Lastpage

2196

Abstract

The architecture of a Software Defined Radio (SDR) multi-standard baseband processor are presented. As the first representative of a new SDR baseband family, the X-GOLD™ SDR20 has been successfully designed and fabricated in a 65nm CMOS process. The physical layer signal processing for GSM, EDGE, GPRS, UMTS, HSPA, GMR1-3G, and LTE can be implemented in software on this single-chip device. Respective GSM, UMTS and LTE lab demonstrations have proven the competitiveness of this SDR approach.

Keywords

3G mobile communication; CMOS integrated circuits; Long Term Evolution; cellular radio; code division multiple access; packet radio networks; signal processing; software radio; CMOS processing; EDGE; GMR1-3G; GPRS; GSM; HSPA; LTE; SDR multistandard baseband processor; UMTS; X-GOLD™ SDR20; physical layer signal processing; single-chip device; size 65 nm; software defined radio multistandard baseband processor; Baseband; Clocks; Computer architecture; Hardware; Process control; Software; Synchronization;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (ISCAS), 2011 IEEE International Symposium on

Conference_Location

Rio de Janeiro

ISSN

0271-4302

Print_ISBN

978-1-4244-9473-6

Electronic_ISBN

0271-4302

Type

conf

DOI

10.1109/ISCAS.2011.5938035

Filename

5938035