DocumentCode :
1997451
Title :
A CMOS baseline holder (BLH) for readout ASICs
Author :
De Geronimo, G. ; O´Connor, P. ; Grosholz, J.
Author_Institution :
Div. of Instrum., Brookhaven Nat. Lab., Upton, NY, USA
Volume :
1
fYear :
1999
fDate :
1999
Firstpage :
370
Abstract :
As a result of a cooperation between Brookhaven National Laboratory and eV Products a generation of high performance readout ASICs was developed. One of the novel circuit solutions implemented in the ASICs is the baseline holder (BLH), a system which provides setting and stabilization of the output baseline both at low frequency and at high rate operation. The BLH is conceptually different from the baseline restorer (BLR). With a output peaking voltage 2V (10 fC), a peaking time 400 ns and a rate 500 kHz, an asymptotic shift of the base-line <8 mV was measured
Keywords :
CMOS analogue integrated circuits; application specific integrated circuits; nuclear electronics; readout electronics; 2 V; 400 ns; 500 kHz; CMOS baseline holder; asymptotic shift; baseline restorer; output baseline; output peaking voltage; peaking time; readout ASICs; Application specific integrated circuits; CMOS technology; Detectors; Feeds; Frequency; Laboratories; Leak detection; Low pass filters; Signal processing; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Nuclear Science Symposium, 1999. Conference Record. 1999 IEEE
Conference_Location :
Seattle, WA
ISSN :
1082-3654
Print_ISBN :
0-7803-5696-9
Type :
conf
DOI :
10.1109/NSSMIC.1999.842511
Filename :
842511
Link To Document :
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