Title :
Self-Programmable Shared BIST for Testing Multiple Memories
Author :
Bahl, Swapnil ; Srivastava, Vishal
Author_Institution :
STMicroelectronics Pvt Ltd., Noida
Abstract :
Hundreds of memory instances and their frequency of operation have ruled out the possibility of sharing test structures amongst the embedded memories. This paper discusses the techniques and flow for sharing an embedded memory BIST for the at- speed testing of multiple memories on a typical SoC.
Keywords :
built-in self test; embedded systems; logic testing; semiconductor storage; system-on-chip; SoC; at- speed testing; built-in-self test; embedded memories; multiple memory testing; pipeline architecture; self-programmable shared BIST; semiconductor memory; Automatic testing; Built-in self-test; Costs; Engines; Fabrication; Frequency; Logic arrays; Random access memory; System testing; Time to market; Built-in Self-test (BIST); Memory testing and Semiconductor memory.; Pipeline architecture;
Conference_Titel :
Test Symposium, 2008 13th European
Conference_Location :
Verbania
Print_ISBN :
978-0-7695-3150-2
DOI :
10.1109/ETS.2008.16
