Title :
A novel technique to reduce the metastability of Bang-Bang Phase Frequency Detectors
Author :
Javidan, M. ; Zianbetov, E. ; Anceau, F. ; Galayko, D. ; Colinet, E. ; Juillard, J.
Author_Institution :
LIP6 Lab., Paris VI Univ., Paris, France
Abstract :
This paper presents a new architecture of bang- bang phase frequency detector based on standard cells. The pro- posed architecture presents advantages in terms of compatibility with fully-automated design flow of digital circuitry compared with other architectures. The metastability failure is also studied. The reliability of this architecture is approved by simulation results in CMOS65 nm.
Keywords :
CMOS integrated circuits; circuit stability; failure analysis; phase detectors; CMOS process; bang-bang phase frequency detectors; metastability failure; metastability reduction; size 65 nm; Clocks; Detectors; Integrated circuit modeling; Inverters; Phase locked loops; Topology;
Conference_Titel :
Circuits and Systems (ISCAS), 2011 IEEE International Symposium on
Conference_Location :
Rio de Janeiro
Print_ISBN :
978-1-4244-9473-6
Electronic_ISBN :
0271-4302
DOI :
10.1109/ISCAS.2011.5938131
