A single-chip 2.4GHz low-power CMOS receiver and transmitter for WPAN applications

A single ship 2.4 GHz low power CMOS receiver and transmitter for WPAN applications are implemented and measured. The receiver uses a low-IF architecture with a poly-phase filter and transistor linearization technique to improve linearity per power, and the transmitter adopts a ROM based direct-conversion architecture for low power consumption and high integrated density. Experimental results show -79 dBm of sensitivity, 13 dB of receiver NF, -4.5dBm of receiver IIP3, and -4dBm of transmitter output power. The power consumption is 9 mW in receiver and 17 mW in transmitter at 1.8 V, respectively.