DocumentCode
1998724
Title
The Pheet Task-Scheduling Framework on the Intel® Xeon Phi Coprocessor and other Multicore Architectures
Author
Wimmer, Manuel ; Poter, Manuel ; Traff, Jesper Larsson
Author_Institution
Res. Group Parallel Comput., Vienna Univ. of Technol., Vienna, Austria
fYear
2013
fDate
20-24 May 2013
Firstpage
1587
Lastpage
1596
Abstract
Pheet, a task-scheduling framework that allows for easy customization of internal data-structures, is a research vehicle for experimenting with high-level application and low-level architectural support for task-parallel programming models. Pheet is highly configurable, and allows comparison between different implementations of data structures used in the scheduler, as well as comparisons between entirely different schedulers (typically using work-stealing). Pheet is being used to investigate high-level task-parallel support mechanisms that allow applications to influence scheduling decisions and behavior. One such mechanism, that we use in this work, is scheduling strategies. Previous Pheet benchmarking was done on conventional multicore architectures from AMD and Intel. In this paper we discuss the performance of Pheet on a prototype Intel Xeon Phi coprocessor with 61 cores. We compare these results to Pheet on three conventional multicore architectures. Using two benchmarks from the mostly non-numerical/combinatorial Pheet suite we find that the Xeon Phi coprocessor provides considerably better scalability than the other architectures, with more than a 70x speedup on the 61-core Knights Corner prototype system when using 4-way SMT, although not achieving the same absolute performance. For our research, the Xeon Phi coprocessor is an interesting architecture for implementing and evaluating fine-grained task-parallel parallel algorithm implementations.
Keywords
coprocessors; multiprocessing systems; parallel programming; scheduling; task analysis; AMD; Intel Xeon Phi coprocessor; Pheet benchmarking; combinatorial Pheet suite; customization; data structures; multicore architectures; nonnumerical Pheet suite; schedulers; task parallel parallel algorithm; task parallel programming models; Coprocessors; Instruction sets; Multicore processing; Scalability; Scheduling; Vectors; Work-stealing; Xeon Phi; fine-grained multi threaded applications; priorities; strategies;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel and Distributed Processing Symposium Workshops & PhD Forum (IPDPSW), 2013 IEEE 27th International
Conference_Location
Cambridge, MA
Print_ISBN
978-0-7695-4979-8
Type
conf
DOI
10.1109/IPDPSW.2013.22
Filename
6651055
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