Title :
2-D state space filter with fewer multipliers
Author :
Misra, Pradeep ; Shaw, Arnab
Author_Institution :
Dept. of Electr. Eng., Wright State Univ., Dayton, OH, USA
Abstract :
Summary form only given. It is shown that compared to existing realizations, a considerable reduction in the number of multipliers for hardware realizations of 2-D state-space digital filters can be achieved. This is accomplished by transformation of the given system to a block diagonal canonical structure. A computational algorithm has been developed to reduce the system to the structured form shown, and a WAVEFRONT array architecture has been proposed to implement it in hardware
Keywords :
digital arithmetic; filtering and prediction theory; picture processing; state-space methods; two-dimensional digital filters; 2D filter; WAVEFRONT array architecture; block diagonal canonical structure; computational algorithm; hardware realizations; image processing; multipliers reduction; state-space digital filters; Adders; Circuits; Delay; Digital filters; Hardware; Multidimensional signal processing; State-space methods; Transfer functions; Two dimensional displays; Very large scale integration;
Conference_Titel :
Multidimensional Signal Processing Workshop, 1989., Sixth
Conference_Location :
Pacific Grove, CA
DOI :
10.1109/MDSP.1989.97088
