A novel method of synthesizing reversible logic

As a new technique for low-power design and quantum computing, reversible logic has been paid much attention. A significant part of research lies in synthesizing a reversible network from non-reversible specification. However, current synthesis algorithms for reversible circuits suffer low efficiency and do not reach area optimization, so they are only applicable to small logic functions. In this paper, we propose a new method based on positive Davio expansion to synthesize reversible circuits, which generates a positive Davio decision diagram for a logic function and transfers diagram nodes to reversible circuits. Compared to BDD-based and Reed-Muller (RM) based synthesis methods, our algorithm can optimize area and have fast synthesis speed, so it is suitable for large functions.