• DocumentCode
    2001156
  • Title

    AROMA: A highly accurate microcomponent-based approach for embedded processor power analysis

  • Author

    Zih-Ci Huang ; Chi-Kang Chen ; Ren-Song Tsay

  • Author_Institution
    Dept. of Comput. Sci., Nat. Tsing-Hua Univ., Hsinchu, Taiwan
  • fYear
    2015
  • fDate
    19-22 Jan. 2015
  • Firstpage
    761
  • Lastpage
    766
  • Abstract
    We propose a new embedded processor power analysis approach that maps instruction executions to microarchitecture components for highly efficient and accurate power evaluations, which are crucial for embedded system designs. We observe that in practice, the execution of each high-level instruction in a processor always triggers the same microcomponent activity sequence while the difference of power consumption values of different instructions is mainly due to timing variations caused by hazards and cache misses. Hence, by incorporating accurately pre-characterized microcomponent power consumption values into an efficient instruction-microcomponent processor timing simulation tool, we construct a highly accurate embedded processor power analysis tool. Additionally, based on the proposed approach, we accurately and effortlessly capture the power waveform at any time point for power profiling, peak power and dynamic thermal distribution analysis. The experimental results show that the proposed approach is nearly as accurate as gate-level simulators, with an error rate of less than 1.2% while achieving simulation speeds of up to 20 MIPS, five orders faster than a commercial gate-level simulator.
  • Keywords
    embedded systems; logic gates; microprocessor chips; power consumption; AROMA; dynamic thermal distribution analysis; embedded processor power analysis; gate-level simulator; high-level instruction; instruction-microcomponent processor; microarchitecture component; microcomponent power consumption value; microcomponent-based approach; power profiling; power waveform; Analytical models; Computational modeling; Estimation; Logic gates; Pipelines; Power demand; Timing; Embedded System; Peak Power Analysis; Power Analysis; Power Profiling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference (ASP-DAC), 2015 20th Asia and South Pacific
  • Conference_Location
    Chiba
  • Print_ISBN
    978-1-4799-7790-1
  • Type

    conf

  • DOI
    10.1109/ASPDAC.2015.7059102
  • Filename
    7059102