A “smart” switch based three-phase ZVS PWM topology

Author

Agelidis, Vassilios G. ; Vincenti, Donato

Author_Institution

Dept. of Electr. Eng., Curtin Univ. of Technol., Perth, WA, Australia

fYear

1994

fDate

13-17 Feb 1994

Firstpage

275

Abstract

Soft switching conditions, namely zero-voltage switching (ZVS), for medium power high-frequency inverters are becoming of great interest. In this paper, a complete analysis and design procedure of a simple DC bus commutating subcircuit is discussed. The “smart” switch in combination with a DC bus capacitor provides the zero-volts interval across the inverter DC bus only when needed and in synchronisation with the pulsewidth modulation strategy. Another advantage includes no significant overvoltage across the inverter switches since the output load inductance and no other added one is used to achieve ZVS. Key theoretical results are extensively verified by simulation

Keywords

commutation; invertors; pulse width modulation; switching circuits; DC bus capacitor; DC bus commutating subcircuit; high-frequency inverters; medium power; output load inductance; pulsewidth modulation; smart switch; soft switching; synchronisation; three-phase ZVS PWM topology; zero-voltage switching; zero-volts interval; Capacitors; Inductance; Pulse inverters; Pulse modulation; Pulse width modulation; Pulse width modulation inverters; Switches; Topology; Voltage control; Zero voltage switching;

fLanguage

English

Publisher

ieee

Conference_Titel

Applied Power Electronics Conference and Exposition, 1994. APEC '94. Conference Proceedings 1994., Ninth Annual

Conference_Location

Orlando, FL

Print_ISBN

0-7803-1456-5

Type

conf

DOI

10.1109/APEC.1994.316388

Filename

316388