Title :
An Exclusive Cache Model
Author_Institution :
Santa Clara Univ., Santa Clara, CA
Abstract :
This paper proposes a two-level exclusive cache model which does not shuffle blocks between the levels. The two- level cache system is visualized to be either in logical level 1 or level 2. An algorithm that classifies at each reference the physical cache levels into one of logical level 1 or logical level 2 cache is developed. Expressions for the average memory access time of the proposed model are derived and conditions for it to outperform exclusive cache proposed earlier in literature are derived. The model has scalability. Simulations on SPEC2000 show an improvement in average memory access time for two configurations of L1-L2 namely direct-direct with 67%, set associative-set associative with 64%. A degradation of 1% in average memory access time in direct-set associative configuration in L1-L2 is observed.
Keywords :
cache storage; average memory access time; exclusive cache model; logical level visualisation; Degradation; Hardware; Information technology; Logic arrays; Parallel architectures; Power dissipation; Power system modeling; Scalability; Visualization; Average Memory Access Time (AMAT); Non-inclusive cache; Performance;
Conference_Titel :
Information Technology: New Generations, 2009. ITNG '09. Sixth International Conference on
Conference_Location :
Las Vegas, NV
Print_ISBN :
978-1-4244-3770-2
Electronic_ISBN :
978-0-7695-3596-8
DOI :
10.1109/ITNG.2009.89