DocumentCode
2003847
Title
Evolution of asynchronous sequential circuits
Author
Shanthi, A.P. ; Singaram, L. Karthik ; Parthasarathi, Ranjani
Author_Institution
Dept. of Comput. Sci. & Eng., Anna Univ., Chennai, India
fYear
2005
fDate
29 June-1 July 2005
Firstpage
93
Lastpage
96
Abstract
Asynchronous systems are being viewed as an increasingly viable alternative to purely synchronous systems, due to their inherent benefits. At the same time, the complexities involved in such designs make manual designs challenging and suggest the use of evolutionary design procedures. Yet, surprisingly, there has not been an attempt so far to evolve asynchronous sequential circuits. This paper pioneers this attempt and proposes an evolutionary approach for the first time. The evolution is done at two levels using a developmental approach called the developmental Cartesian genetic programming (DCGP) technique. The first level evolution aims at evolving race-free stable circuits, satisfying the input/output combinations, with no hazards or minimal number of hazards. The second level evolution modifies/adds more components to the circuits, in order to make them hazard-free, both with respect to static as well as dynamic hazards. Experimental results for a modulo-six counter and an ISCAS´89 benchmark circuit, ´lion´, are provided as a proof of concept.
Keywords
asynchronous circuits; genetic algorithms; sequential circuits; DCGP; ISCAS´89 benchmark circuit; asynchronous sequential circuit evolution; developmental Cartesian genetic programming; evolutionary design; hazard free circuit; modulo-six counter; race-free stable circuit; Asynchronous circuits; Circuit simulation; Clocks; Combinational circuits; Computer science; Counting circuits; Genetic programming; Hardware; Hazards; Sequential circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Evolvable Hardware, 2005. Proceedings. 2005 NASA/DoD Conference on
ISSN
1550-6029
Print_ISBN
0-7695-2399-4
Type
conf
DOI
10.1109/EH.2005.23
Filename
1508487
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