A 256 K static random-access memory implemented in silicon-on-insulator technology

Author

Van Vonno, N. ; Doyle, B.R.

Author_Institution

Div. of Mil. & Aerosp., Harris Semicond., Melbourne, FL, USA

fYear

1993

fDate

13-16 Sep 1993

Firstpage

392

Lastpage

395

Abstract

We discuss a 256 K static random-access memory for space applications, implemented in an advanced silicon-on-insulator technology. Results obtained in electrical characterization, radiation testing and reliability evaluations are discussed. The part is being sampled and will be built in a production submicrometer fabrication facility on 6" starting substrates. The HS-65759 will provide a cost-effective solution for SEU-resistant memory for demanding space applications

Keywords

CMOS integrated circuits; SRAM chips; circuit reliability; integrated circuit testing; semiconductor-insulator boundaries; silicon; 256 Kbit; CMOS structure; HS-65759; SEU-resistant memory; electrical characterization; radiation testing; reliability evaluations; silicon-on-insulator technology; space applications; static random-access memory; submicrometer fabrication facility; CMOS technology; Charge carrier lifetime; Insulation; Ion implantation; Random access memory; Silicon on insulator technology; Single event upset; Space technology; Substrates; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Radiation and its Effects on Components and Systems, 1993.,RADECS 93., Second European Conference on

Conference_Location

St. Malo

Print_ISBN

0-7803-1793-9

Type

conf

DOI

10.1109/RADECS.1993.316571

Filename

316571