• DocumentCode
    2004738
  • Title

    Efficient hardware data mining with the Apriori algorithm on FPGAs

  • Author

    Baker, Zachary K. ; Prasanna, Viktor K.

  • Author_Institution
    Univ. of Southern California, Los Angeles, CA, USA
  • fYear
    2005
  • fDate
    18-20 April 2005
  • Firstpage
    3
  • Lastpage
    12
  • Abstract
    The Apriori algorithm is a popular correlation-based data mining kernel. However, it is a computationally expensive algorithm and the running times can stretch up to days for large databases, as database sizes can extend to Gigabytes. Through the use of a new extension to the systolic array architecture, time required for processing can be significantly reduced. Our array architecture implementation on a Xilinx Virtex-II Pro 100 provides a performance improvement that can be orders of magnitude faster than the state-of-the-art software implementations. The system is easily scalable and introduces an efficient "systolic injection" method for intelligently reporting unpredictably generated mid-array results to a controller without any chance of collision or excessive stalling.
  • Keywords
    data mining; field programmable gate arrays; parallel algorithms; systolic arrays; Apriori algorithm; FPGA; Xilinx Virtex-II Pro 100 architecture; hardware data mining; state-of-the-art software implementation; systolic array architecture; systolic injection method; Algorithm design and analysis; Application specific integrated circuits; Clustering algorithms; Computer architecture; Data mining; Databases; Field programmable gate arrays; Hardware; Microcontrollers; Systolic arrays;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field-Programmable Custom Computing Machines, 2005. FCCM 2005. 13th Annual IEEE Symposium on
  • Print_ISBN
    0-7695-2445-1
  • Type

    conf

  • DOI
    10.1109/FCCM.2005.31
  • Filename
    1508521