DocumentCode
2005023
Title
Parallel Type Modulator for QPSK and SQPSK Modulation in Advanced Technology
Author
Spinnler, M. ; Alberty, M. ; Ohm, G.
Author_Institution
ANT Telecommunication
fYear
1989
fDate
4-7 Sept. 1989
Firstpage
692
Lastpage
698
Abstract
Design and hardware realisation of a parallel type QPSK/SQPSK modulator for a center frequency of 15 GHz and a bit rate of 300 Mbit/sec is described. Analytical expressions and calculations with respect to static phase and magnitude accuracy for the chosen topology are presented. The measured phase and amplitude balance are less than 1.60 and 0.2 dB at center frequency and ambient temperature. The encoder and driver circuit for the modulator was realised as a custom specific IC in a bipolar process with transit a frequency (fT) of 6 GHz. Typical rise and fall times for phase transitions are less than 400 ps and allow bit rates up to 700 Mbit/sec. Bit error rate was measured in a transponder test system and shows a degradation of 0.3 dB at a bit error rate of 10¿6.
Keywords
Bipolar integrated circuits; Bit error rate; Bit rate; Circuit topology; Driver circuits; Frequency measurement; Hardware; Phase measurement; Quadrature phase shift keying; Temperature;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Conference, 1989. 19th European
Conference_Location
London, UK
Type
conf
DOI
10.1109/EUMA.1989.334049
Filename
4132761
Link To Document