DocumentCode
2006634
Title
Software-hardware co-design for video coding acceleration
Author
Niu, Xinwei ; Galarza, Luis ; Gao, Ying ; Fan, Jeffrey
Author_Institution
Dept. of Electr. & Comput. Eng., Florida Int. Univ., Miami, FL, USA
fYear
2012
fDate
11-13 March 2012
Firstpage
57
Lastpage
60
Abstract
In this paper, an advanced video coding acceleration based on software-hardware co-design for low power embedded system is proposed. Today, people enjoy HD video formats all over the world, but to compress it into a portable format (such as H.264) costs too much time. In embedded systems, it is very costly to transform the entire software application into a hardware solution especially if it will consume a large amount of power. Thus, we studied the famous H.264 model in order to explore the hotspot function and balance the tradeoff between speed and energy consumption. The idea is to only transform the more readily used functions into hardware by designing a coprocessor and implementing it on Virtex 5 Field-Programmable Gate Array (FPGA) platform. The experimental results from this hardware implementation showed a 5 times increase in coding speed while minimizing the energy consumption to around 81 percent.
Keywords
coprocessors; embedded systems; energy consumption; field programmable gate arrays; hardware-software codesign; video coding; H.264 format; HD video format; Virtex 5 field programmable gate array; coding speed; coprocessor; energy consumption; high definition video format; hotspot function; low power embedded system; software application; software-hardware codesign; video coding acceleration; Acceleration; Encoding; Energy consumption; Hardware; IP networks; Software; Video coding; Co-processor; Embedded System; H.264; Hardware Acceleration;
fLanguage
English
Publisher
ieee
Conference_Titel
System Theory (SSST), 2012 44th Southeastern Symposium on
Conference_Location
Jacksonville, FL
ISSN
0094-2898
Print_ISBN
978-1-4577-1492-4
Type
conf
DOI
10.1109/SSST.2012.6195122
Filename
6195122
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