Efficient FPGA implementation of steerable Gaussian smoothers

Smoothing filters have been extensively used in image and video analysis. In particular, directional smoothers have been employed in motion analysis, edge detection, line parameter estimation, and texture analysis. Such applications often necessitate the use of several directional filters oriented at different angles. However, applying a large number of filters commonly requires a significant amount of computing resources. In such cases, real-time performance may be possibly achieved through utilization of hardware devices having parallel processing capabilities. Additionally, techniques can take advantage of the inherent properties of certain smoothing filters. Such a property is steerability, which implies that the outputs of several filtering operations can be linearly combined in order to produce the output of a directional filter at an arbitrary orientation. Although several efficient FPGA implementations of the convolution operation have been presented in the literature for non-separable and separable, research on steerable filter implementations on FPGA is limited. In this paper, steerable Gaussian smoothers are implemented on an FPGA platform. The technique is compared with a software-based implementation. Performance comparisons indicate that the FPGA technique provides significant speed-up factor of at least ~6, utilizing only a small percentage of the FPGA resources.