A 3-D single-electron-memory cell structure with 2F/sup 2/ per bit

Summary form only given. A 3-dimensional (3-D) single-electron memory cell, which achieves an area of 2F/sup 2/ per bit (where F is the feature size of the fabricated structures), is proposed. In the proposed vertically united cell (VUC), two cells are stacked vertically which only adds a few steps to the whole fabrication process. The results obtained demonstrate that the single-electron memory has a cost advantage over conventional memories in terms of giga-scale memories. Moreover, with the aim of producing single-electron memory LSI, MOS devices are fabricated on the same wafer as the VUCs, and this set-up shows successful operation.