Title : 
A generic reconfigurable neural network architecture as a network on chip
         
        
            Author : 
Theocharides, T. ; Link, G. ; Vijaykrishnan, N. ; Invin, M.J. ; Srikantam, V.
         
        
            Author_Institution : 
Pennsylvania State Univ., USA
         
        
        
        
        
        
            Abstract : 
Neural networks are widely used in pattern recognition, security applications and data manipulation. We propose a hardware architecture for a generic neural network, using network on chip (NoC) interconnect. The proposed architecture allows for expandability, mapping of more than one logical unit onto a single physical unit, and dynamic reconfiguration based on application-specific demands. Simulation results show that this architecture has significant performance benefits over existing architectures.
         
        
            Keywords : 
network synthesis; neural net architecture; reconfigurable architectures; NoC interconnect; data manipulation; dynamic reconfiguration; expandability; generic neural network architecture; hardware architecture; network on chip; pattern recognition; reconfigurable neural network architecture; security; Application software; Artificial neural networks; Biological neural networks; Data security; Machine learning; Network-on-a-chip; Neural network hardware; Neural networks; Neurons; Real time systems;
         
        
        
        
            Conference_Titel : 
SOC Conference, 2004. Proceedings. IEEE International
         
        
            Print_ISBN : 
0-7803-8445-8
         
        
        
            DOI : 
10.1109/SOCC.2004.1362404