Title :
Performance and power efficient on-chip communication using adaptive virtual point-to-point connections
Author :
Modarressi, Mehdi ; Sarbazi-Azad, Hamid ; Tavakkol, Arash
Author_Institution :
Sharif Univ. of Technol., Tehran
Abstract :
In this paper, we propose a packet-switched network-on-chip (NoC) architecture which can provide a number of low-power, low-latency virtual point-to-point connections for communication flows. The work aims to improve the power and performance metrics of packet-switched NoC architectures and benefits from the power and resource utilization advantages of NoCs and superior communication performance of point-to-point dedicated links. The virtual point-to-point connections are set up by bypassing the entire router pipeline stages of the intermediate nodes. This work addresses constructing the virtual point-to-point connections at run-time using a light-weight setup network. It involves monitoring the NoC traffic in order to detect heavy communication flows and setting up a virtual point-to-point connection for them using a run-time circuit construction mechanism. The evaluation results show a significant reduction in power and latency over a traditional packet-switched NoC.
Keywords :
network-on-chip; packet switching; adaptive virtual point-to-point connections; on-chip communication; packet-switched network-on-chip architecture; power utilization; resource utilization; Buffer storage; Delay; Measurement; Network-on-a-chip; Pipelines; Runtime; Scalability; System-on-a-chip; Telecommunication traffic; Virtual colonoscopy;
Conference_Titel :
Networks-on-Chip, 2009. NoCS 2009. 3rd ACM/IEEE International Symposium on
Conference_Location :
San Diego, CA
Print_ISBN :
978-1-4244-4142-6
Electronic_ISBN :
978-1-4244-4143-3
DOI :
10.1109/NOCS.2009.5071468