DocumentCode
2010278
Title
Computation with Energy-Time Trade-Offs: Models, Algorithms and Lower-Bounds
Author
Bingham, Brad D. ; Greenstreet, Mark R.
Author_Institution
Dept. of Comput. Sci., Univ. of British Columbia, Vancouver, BC
fYear
2008
fDate
10-12 Dec. 2008
Firstpage
143
Lastpage
152
Abstract
Power consumption has become one of the most critical concerns for processor design. This motivates designing algorithms for minimum execution time subject to energy constraints. We propose simple models for analysing algorithms that reflect the energy-time trade-offs of CMOS circuits. Using these models, we derive lower bounds for the energy-constrained execution time of sorting, addition and multiplication, and we present algorithms that meet these bounds. We show that minimizing time under energy constraints is not the same as minimizing operation count or computation depth.
Keywords
power aware computing; CMOS circuits; energy-constrained execution time; energy-time trade-offs; power consumption; processor design; Algorithm design and analysis; CMOS logic circuits; Computational modeling; Concurrent computing; Parallel processing; Programming profession; Semiconductor device modeling; Sorting; Topology; Voltage; complexity; energy-time trade-offs; models of computation;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel and Distributed Processing with Applications, 2008. ISPA '08. International Symposium on
Conference_Location
Sydney, NSW
Print_ISBN
978-0-7695-3471-8
Type
conf
DOI
10.1109/ISPA.2008.127
Filename
4725144
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