• DocumentCode
    2011372
  • Title

    Backgate bias and stress level impact on giant piezoresistance effect in thin silicon films and nanowires

  • Author

    Passi, Vikram ; Ravaux, Florent ; Dubois, Emmanuel ; Raskin, Jean-Pierre

  • Author_Institution
    Electr. Dept., Univ. Catholique de Louvain, Louvain-la-Neuve, Belgium
  • fYear
    2010
  • fDate
    24-28 Jan. 2010
  • Firstpage
    464
  • Lastpage
    467
  • Abstract
    Top-down fabrication and electrical characterization of undoped p-type silicon nanowires with and without stress using a 4-point bending fixture are shown. Uniaxial tensile stress values of around 200 MPa are possible with the bending fixture. Giant piezoresistance is measured for wires of 50 nm-thick and widths from 25 nm to 1 ¿m. Nonlinear characteristics at high stress level and impact of backgate bias on piezoresistance coefficient are presented for the first time.
  • Keywords
    nanofabrication; nanowires; piezoresistance; semiconductor thin films; backgate bias; electrical characterization; giant piezoresistance effect; stress level impact; thin silicon films; top-down fabrication; undoped p-type silicon nanowires; Chemistry; Etching; Fabrication; Nanowires; Nitrogen; Piezoresistance; Resists; Semiconductor films; Silicon; Stress;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Micro Electro Mechanical Systems (MEMS), 2010 IEEE 23rd International Conference on
  • Conference_Location
    Wanchai, Hong Kong
  • ISSN
    1084-6999
  • Print_ISBN
    978-1-4244-5761-8
  • Electronic_ISBN
    1084-6999
  • Type

    conf

  • DOI
    10.1109/MEMSYS.2010.5442464
  • Filename
    5442464