Title :
FAUST-a fault tolerant sparing technique for ATM switch architectures
Author :
Padmanabhan, Krishnan
Author_Institution :
Comput. Syst. Res. Lab., AT&T Bell Labs., Murray Hill, NJ, USA
fDate :
29 Nov-2 Dec 1993
Abstract :
A family of fault tolerant architectures for ATM switching called FAUST is presented in this paper. The key idea behind the architecture is the incorporation of spare units and associated commutation logic into strategic partitions of the switching system. The definition of a replaceable unit is flexible, and based on packaging considerations. The commutation logic can switch in a spare unit in place of a failed one at cell rate, and is distributed entirely in the existing switch control units. So the additional overhead is almost entirely in the spare modules provided. The technique is far superior to a duplex configuration in terms of both reliability improvement and cost, and can be applied to established architectures for ATM switches, including multistage sort and shared memory based architectures. Its scalability also makes it applicable to system sizes from a few tens of lines to a few thousand
Keywords :
asynchronous transfer mode; electronic switching systems; logic circuits; modules; reliability; ATM switch architectures; FAUST; cell rate; commutation logic; fault tolerant sparing technique; multistage sort architecture; packaging; reliability; replaceable unit; scalability; shared memory based architectures; spare modules; spare units; switch control units; switching system; system sizes; Asynchronous transfer mode; Communication switching; Computer architecture; Costs; Fabrics; Fault tolerance; Fault tolerant systems; Hardware; Logic; Switches;
Conference_Titel :
Global Telecommunications Conference, 1993, including a Communications Theory Mini-Conference. Technical Program Conference Record, IEEE in Houston. GLOBECOM '93., IEEE
Conference_Location :
Houston, TX
Print_ISBN :
0-7803-0917-0
DOI :
10.1109/GLOCOM.1993.318293