Title :
Soft Error Immune 180/spl mu/m/sup 2/ Sicos Upward Transistor Memory Cell Suitable for Ultra-High-Speed High-Density Bipolar Memories
Author :
Idei, Y. ; Shiba, T. ; Homma, N. ; Yamaguchi, K. ; Nakamura, T. ; Onai, T. ; Namba, M. ; Tarnaki, Y. ; Sakurai, Y.
Author_Institution :
Hitachi Device Engineering, Ltd., Japan
Keywords :
Capacitance; Current measurement; Equivalent circuits; Log periodic antennas; Temperature dependence; Voltage;
Conference_Titel :
VLSI Technology, 1991. Digest of Technical Papers., 1991 Symposium on
Conference_Location :
Oiso, Japan
DOI :
10.1109/VLSIT.1991.705988
