DocumentCode
2011856
Title
Uncriticality-Directed Low-Power Instruction Scheduling
Author
Watanabe, Shingo ; Sato, Toshinori
Author_Institution
Kyushu Inst. of Technol., Fukuoka
fYear
2008
fDate
7-9 April 2008
Firstpage
69
Lastpage
74
Abstract
Intelligent mobile information devices require low-power and high-performance processors. In order to reduce energy consumption with maintaining computing performance, we proposed to utilize information regarding instruction criticality. Every functional unit in our processor has different latency and energy consumption. Only critical instructions are executed in power-hungry units, and the total energy consumption can be reduced. While we have studied several techniques to identify critical instructions for years, we have not found any technique that achieves both simplicity and high accuracy to identify. In this paper, we propose to exploit uncriticality rather than criticality. Only uncritical instructions are executed in power-efficient units, and energy consumption can be reduced. Our simulation results show approximately 10% energy reduction.
Keywords
embedded systems; low-power electronics; microprocessor chips; scheduling; Intelligent mobile information devices; energy consumption; high-performance processors; power-efficient units; power-hungry units; uncriticality-directed low-power instruction scheduling; Clocks; Computer aided instruction; Delay; Energy consumption; MOSFETs; Microprocessors; Mobile computing; Processor scheduling; Subthreshold current; Threshold voltage; instruction scheduling; low-power; microprocessors;
fLanguage
English
Publisher
ieee
Conference_Titel
Symposium on VLSI, 2008. ISVLSI '08. IEEE Computer Society Annual
Conference_Location
Montpellier
Print_ISBN
978-0-7695-3291-2
Electronic_ISBN
978-0-7695-3170-0
Type
conf
DOI
10.1109/ISVLSI.2008.64
Filename
4556772
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