DocumentCode :
2011937
Title :
A circular pipeline processing based deterministic parallel test pattern generator
Author :
Kuen-Wei Yeh ; Jiun-Lang Huang ; Hao-Jan Chao ; Laung-Terng Wang
Author_Institution :
Grad. Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fYear :
2013
fDate :
6-13 Sept. 2013
Firstpage :
1
Lastpage :
8
Abstract :
Parallel programming is an attractive solution to accelerate test pattern generation (TPG); however, the associated non-determinism often leads to non-reproducible test pattern sets. In this paper, the circular pipeline processing (CPP) principle is proposed to facilitate deterministic parallel TPG. CPP preserves the task processing orders that are necessary to ensure TPG determinism with low inter-thread synchronization overhead. Based on CPP, a deterministic parallel test pattern generator is developed; it guarantees to produce the same test pattern set regardless of the thread timing and the thread count. Experimental results on benchmark circuits show that the proposed test pattern generator exhibits close-to-linear speedup for at least up to 12 threads.
Keywords :
automatic test pattern generation; benchmark testing; parallel programming; pipeline processing; benchmark circuits; circular pipeline processing; deterministic parallel test pattern generator; interthread synchronization overhead; task processing orders; thread count; thread timing; Circuit faults; Compaction; Fault detection; Instruction sets; Pipeline processing; Pipelines; Test pattern generators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference (ITC), 2013 IEEE International
Conference_Location :
Anaheim, CA
ISSN :
1089-3539
Type :
conf
DOI :
10.1109/TEST.2013.6651913
Filename :
6651913
Link To Document :
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