Custom design of multi-level dynamic memory management subsystem for embedded systems

In this paper, we propose a new approach to design convenient dynamic memory management subsystems, profiting from the multiple memory levels. It analyzes the logical phases involved in modem dynamic applications to effectively distribute the dynamically allocated data among the multi-level memory hierarchies present in embedded devices. We assess the effectiveness of the proposed approach for three representative real-life case studies of the new dynamic application domains (i.e., network and 3D rendering applications) ported to embedded systems. The results accomplished with our approach show a very significant reduction in energy consumption (up to 40%) over state-of-the-art solutions for dynamic memory management on embedded systems with typical cache-main memory architectures while respecting the real-time requirements of these applications.