• DocumentCode
    2012416
  • Title

    Performance Improvement of Physical Retiming with Shortcut Insertion

  • Author

    Dokhanchi, Adel ; Rezvani, Mostafa ; Jahanian, Ali ; Zamani, Morteza Saheb

  • Author_Institution
    Dept. of Comput. Eng., Amirkabir Univ. of Technol., Tehran
  • fYear
    2008
  • fDate
    7-9 April 2008
  • Firstpage
    215
  • Lastpage
    220
  • Abstract
    Retiming is a well known method for improving the performance of sequential circuits. However, maximum cycle ratio (MCR) is one of the most serious restrictions to be considered by retiming-based techniques. As MCR is proportional to the critical cycle delay, finding shortcut paths to reduce the length of critical cycle can improve the circuit performance. In this paper, Shannon decomposition is used iteratively to insert shortcuts and reduce critical cycles delay. Reducing MCR can lead to better physical retiming results due to available placement information. Our experimental results show more than 16% improvement in retiming gained performance with the area overhead of about 3%, on average.
  • Keywords
    delay circuits; iterative methods; performance evaluation; sequential circuits; timing circuits; Shannon decomposition; circuit performance improvement; critical cycle delay; maximum cycle ratio; physical retiming; sequential circuits; Circuit optimization; Clustering algorithms; Computer Society; Delay; Field programmable gate arrays; Integrated circuit interconnections; Partitioning algorithms; Physics computing; Sequential circuits; Very large scale integration; Maximum cycle ratio; Shannon decomposition; physical design; retiming;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Symposium on VLSI, 2008. ISVLSI '08. IEEE Computer Society Annual
  • Conference_Location
    Montpellier
  • Print_ISBN
    978-0-7695-3291-2
  • Electronic_ISBN
    978-0-7695-3170-0
  • Type

    conf

  • DOI
    10.1109/ISVLSI.2008.38
  • Filename
    4556797