DocumentCode
2012556
Title
(100)- and (110)-oriented nMOSFETs with highly scaled EOT in La-silicate/Si interface for multi-gate architecture
Author
Kawanago, T. ; Kakushima, K. ; Ahmet, P. ; Kataoka, Y. ; Nishiyama, A. ; Sugii, N. ; Tsutsui, K. ; Natori, K. ; Hattori, T. ; Iwai, H.
Author_Institution
Frontier Res. Center, Tokyo Inst. of Technol., Yokohama, Japan
fYear
2012
fDate
17-21 Sept. 2012
Firstpage
89
Lastpage
92
Abstract
This paper reports on detailed comparison between (100)- and (110)-oriented nMOSFETs with direct contact of La-silicate/Si interface structure for expansion to multi-gate architecture including FinFETs, trigate FETs, and nanowire FETs. Scaled EOT of 0.73 nm for (110)-oriented nMOSFETs has been achieved as well as (100)-oriented nMOSFETs. Although the large interface state density originating from (110) orientation was observed, fairly nice interfacial property was obtained from (110)-oriented nMOSFETs at scaled EOT region. Moreover, larger interface state density in (110) orientation did not affect on Vth instability. It was found that Vth shift of nMOSFETs is mainly caused by bulk trapping of electron in La-silicate as well as Hf-based oxides.
Keywords
MOSFET; nanowires; (100)-oriented nMOSFET; (110)-oriented nMOSFET; EOT; FinFET; La-silicate-Si interface; bulk trapping; interfacial property; multigate architecture; nanowire FET; size 0.73 nm; trigate FET; Dielectrics; Electron mobility; Interface states; Logic gates; Silicon; Substrates;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Device Research Conference (ESSDERC), 2012 Proceedings of the European
Conference_Location
Bordeaux
ISSN
1930-8876
Print_ISBN
978-1-4673-1707-8
Electronic_ISBN
1930-8876
Type
conf
DOI
10.1109/ESSDERC.2012.6343340
Filename
6343340
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